(i) Field of the Invention
The present invention relates to a power supply voltage fluctuation analyzing method, and more particularly to a current source defining method used in a power supply voltage fluctuation analyzing method for a semiconductor product.
(ii) Description of the Related Art
Conventionally, as shown in FIG. 10, this type of power supply voltage fluctuation analysis apparatus is constituted by a cell power consumption library 1a, an arranged wiring library 2, a cell connection information with arrangement position information library 3, an operating frequency library 4, reference wiring capacity extracting means 5, a wiring capacity library 6, wiring length extracting means 7, a wiring length library 8, power consumption calculating means 9, a power consumption library 10, cell size extracting means 11a, a cell size library 12a, cell area dividing means 13a, a division number library 14a, a divided area library 15a, power consumption dividing means 16, a divided power consumption library 17, power consumption allocating means 18, current source converting means 19, a current source information library 20, wiring resistance information extracting means 21, a resistance value library 22, arrangement position information extracting means 23, an arrangement position library 24, power supply voltage fluctuation value calculating means 25, a power supply voltage fluctuation library 26, and power supply designing means 27. It is to be noted that each of the above-described means can be also realized by software.
The cell power consumption library 1a stores therein information which defines a power or a current of entire each function cell calculated in accordance with an operating state of each cell (a state of an input/output signal, a power supply voltage, a temperature, a frequency, input waveform deterioration, a load capacity) in advance.
The arranged wiring library 2 stores therein information which defines a resistance value capacity value of each wiring layer/via. The cell connection information with arrangement position information library 3 stores therein information which defines arrangement position information/circuit connection information of each cell. The operating frequency library 4 stores therein information which defines an operating frequency of each cell.
The reference wiring capacity extracting means 5 extracts a unit capacity in each wiring layer/via from the stored information of the arranged wiring library 2, and the wiring capacity library 6 stores therein information of the unit capacity in each wiring layer/via outputted from the reference wiring capacity extracting means 5.
The wiring length extracting means 7 extracts a layer used in each wiring and its length from the stored information of the cell connection information with arrangement position information library 3, and the wiring length library 8 stores therein information of the layer used in each layer and its length outputted from the wiring length extracting means 7.
The power consumption calculating means 9 calculates a power consumption of each cell from information respectively stored in the cell power consumption library 1a, the operating frequency library 4, the wiring capacity library 6 and the wiring length library 8, and the power consumption library 10 stores therein information of the power consumption outputted from the power consumption calculating means 9.
The cell size extracting means 11a extracts a cell size of each cell from the stored information of the arranged wiring library 2, and the cell size library 12a stores therein information of the cell size outputted from the cell size extracting means 11a. 
The cell area dividing means 13a divides an area of the cell based on the cell size stored in the cell size library 12a, the division number library 14a stores therein a division number of the cell size outputted from the cell area dividing means 13a, and the divided area library 15a stores therein information of the area of the cell outputted from the cell area dividing means 13a. 
The power consumption dividing means 16 divides the power consumption based on the stored information of the power consumption library 10 and the division number library 14a, and the divided power consumption library 17 stores therein information of the power consumption divided by the power consumption dividing means 16.
The power consumption allocating means 18 performs allocation of the power consumption based on the stored information of the divided area library 15a and the divided power consumption library 17, and the current source converting means 19 converts each power consumption value allocated by the power consumption allocating means 18 into a current source. The current source information library 20 stores therein current source information outputted from the current source converting means 19.
The wiring resistance information extracting means 21 extracts a resistance value of each wiring layer/via from the stored information of the arranged wiring library 2, and the resistance value library 22 stores therein information of the resistance value outputted from the wiring resistance information extracting means 21.
The arrangement position information extracting means 23 extracts arrangement position information of each cell from the stored information of the cell connection information with the arrangement position information library 3, and the arrangement position library 24 stores therein information of the arrangement position outputted from the arrangement position information extracting means 23.
The power supply voltage fluctuation value calculating means 25 calculates a power supply voltage fluctuation value from the information respectively stored in the current source information library 20, the resistance value library 22 and the arrangement position library 24, and the power supply voltage fluctuation library 26 stores therein the power supply voltage fluctuation value outputted from the power supply voltage fluctuation value calculating means 25. The power supply designing means 27 adjusts a width and a gap of each power supply wiring based on the stored information of the power supply voltage fluctuation library 26.
The above-described power supply voltage fluctuation analysis apparatus adopts a method that information of a power supply portion is not provided in the cell power consumption library 1 defining a power consumption (current) of each cell and division and allocation of the power consumption are based on a cell size rather than the power supply portion, and the current source defining method uses a unit of cell rather than that of power supply portion.
As this current source defining method, as disclosed in Japanese patent application laid-open No. 099561/2000, there is a current source defining method for each cell in which one current source is provided for one function cell (which will be determined as a first conventional example hereinafter). In this method, the current source sorting is not effected in the function cell.
FIG. 11 shows the current source defining method carried out in the first conventional example. In FIG. 11, function cells 52, 53, 54, 55, 56 and 57 are connected to a VDD line 51, and current sources 58, 59 and 60 are defined for the function cells 54, 55 and 56 which are illustrated as an example, respectively.
Further, as another current source defining method, as disclosed in Japanese patent application laid-open No. 73436/1999, there is a current source defining method that one current source is used with respect to one function cell (which will be determined as a second conventional example hereinafter).
FIG. 12 shows a current source defining method carried out in the second conventional example. In FIG. 12, average currents flowing through circuit blocks 61, 62, 63 and 64 arranged between a VDD line having a plurality of resistances R and a GND line are defined as I61, I62, I63 and I64, respectively. R in FIG. 12 is determined based on a sheet resistance ρs in the wring, a wiring width W and a wiring length L0.
Since the power supply voltage fluctuation analyzing method using such a current source defining method recognizes that the current in the function cell is concentrated on one position of connection points of the current source defined in analysis and the VDD and GND lines, there occurs a problem that the current paths are not dispersed and the power supply voltage fluctuation value becomes larger than an actual value. Since the power consumption is increasing due to realization of a larger scale, higher integration and a higher speed of semiconductor products in recent years and fluctuations in the power supply voltage largely affects the performance of the products, the difficulty in power supply design becomes higher, and improvement in the analysis accuracy is demanded.
In order to fulfill this demand, there is, e.g., a power supply voltage fluctuation analyzing tool “Star-Rail” manufactured by Avant! (which will be determined as a third conventional example hereinafter). FIG. 13 shows a current source defining method carried out in this third conventional example.
In FIG. 13, there are provided first layer lateral VDD lines 71, 73, 75 and 77, first layer lateral GND lines 72, 74 and 76, second layer vertical VDD lines 78 and 80 and second layer vertical GND layers 79 and 81 in an area 70 of an LSI (Large-Scale Integration), and the VDD lines and the GND lines of the first layer and the second layer are connected to each other at respective intersections.
On the other hand, function cells 82, 83, 84, 85, 86, 87, 88, 89 and 90 are arranged in the area 70. Description will be given as to the current source defining method in the function cell 90 among these function cells as an example.
An area which is determined based on dimensions of the function cell 90 in an X direction and a Y direction and in which the function cell 90 is arranged is divided by a fixed dimension, and the entire power consumption is divided by that division number. The divided power consumption values are evenly allocated to all of the divided areas. In this third conventional example, the current source is defined for all of the areas divided with respect to one function cell.
In the above-described power supply voltage fluctuation analysis apparatus, since the number of the current source defined in one function cell is one in the case of the technique disclosed in the first conventional example illustrated in FIG. 11 and the case of the technique disclosed in the second conventional example depicted in FIG. 12, there is no structure that the current source is defined for each power supply source in the function cell.
Furthermore, in case of the technique disclosed in the third conventional example depicted in FIG. 13, there is no structure that the current source is defined for each power supply source like the first conventional example and the second conventional example.
Therefore, when analyzing the power supply voltage fluctuation using the first conventional example and the second conventional example, since the apparatus recognizes that the current in the function cell is concentrated on one position of the connection points of the defined current source and the VDD and GND lines, there occurs a problem that the current paths are not dispersed and the power supply fluctuation value becomes larger than an actual value.
Moreover, when performing the power supply voltage fluctuation analysis using the third conventional example, in a function such as an SRAM (Static Random Access Memory) whose area is larger than that of a basic function cell such as a NAND (NAND gate) and which is arranged so as to extend over a plurality of power supply lines, the power consumption distribution in the function generally becomes uneven. However, there is adopted the power consumption division method that the power consumption distribution becomes even in the entire area where the function cell is arranged, thereby resulting in an operation that an operating current is equally divided between a plurality of the VDD lines running through the function cell.
For example, as shown in FIG. 13, in the function cell 90, the VDD lines 78 and 80 in the vertical direction of the second layer have the equal quantity of supply current. As a result, an inverter with a larger power consumption (inverter or the like which drives a signal line with a large capacity value) is configured in the vicinity of the intersection of the VDD lines 77 and 80 in the function cell 90. Even if the power consumption distribution is biased in the cell, a difference cannot be made between values of the currents flowing through the VDD lines 78 and 80 in the third conventional example, and hence there is a problem that the bias of the power consumption distribution in the function cell cannot be reflected to the power supply design.
In addition, since the current source defining method in the third conventional example adopts the power consumption dividing method depending on a cell area, the division number becomes higher as an area of the function cell increases, and many current sources must be processed during the power supply voltage fluctuation analysis, thereby resulting in a problem that a calculation amount is increased.